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 Data Sheet No.PD 60151-J
IPS031G/IPS032G
SINGLE/DUAL FULLY PROTECTED POWER MOSFET SWITCH
Features
* * * * *
Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection
Product Summary Rds(on) V clamp Ishutdown 70m (max) 50V 12A 1.5s
Description
The IPS031G/IPS032G are fully protected single/dual low side SMART POWER MOSFETs that feature overcurrent, over-temperature, ESD protection and drain to source active clamp.These devices combine a HEXFET (R) POWER MOSFET and a gate driver. They offer full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning off the power MOSFET when the temperature exceeds 165oC or when the drain current reaches 12A. The device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations.
Ton/Toff Packages
8-Lead SOIC IPS031G
Typical Connection
16-Lead SOIC IPS032G (Dual)
Load
R in series (if needed)
D IN control
S
Q
S Logic signal
(Refer to lead assignment for correct pin assignment)
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IPS031G/IPS032G
31
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 m copper thickness. All Sources leads of each mosfet must be connected together to get full current capability
Symbol Parameter
Vds Vin Iin, max Isd cont. Maximum drain to source voltage Maximum input voltage Maximum IN current Diode max. continuous current (1) (rth=125oC/W) IPS031G (for all sd mosfets, rth=85oC/W) IPS032G Isd pulsed Diode max. pulsed current (1) (for ea. mosfet) Pd Maximum power dissipation(1) (rth=125oC/W) IPS031G (for all Pd mosfets, rth=85oC/W) IPS032G ESD1 ESD2 T stor. Tj max. Electrostatic discharge voltage (Human Body) Electrostatic discharge voltage (Machine Model) Max. storage temperature Max. junction temperature
Min.
-- -0.3 -10 -- -- -- -- -- -- -- -55 -40
Max.
47 7 +10 1.4 2 15 1 1.5 4 0.5 150 150
Units
V mA
Test Conditions
A
W
kV
o
C=100pF, R=1500, C=200pF, R=0, L=10H
C
Thermal Chacteristics
Symbol Parameter
Rth1 Thermal resistance Rth2 Thermal resistance Rth1 Thermal resistance (2 mos on) (2 mosfets on) Rth2 Thermal resistance (1 mos on) (1 mosfet on) Rth3 Thermal resistance (2 mos on) (2 mosfets on) with standard footprint with 1" square footprint with standard footprint with standard footprint -- with 1" square footprint -- 60 -- 100 --
Min.
-- -- --
Typ.
100 65 85
Max. Units Test Conditions
-- -- --
o
SOIC-8
C/W SOIC-16
(1) Limited by junction temperature (pulsed current limited also by internal wiring)
2
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IPS031G/IPS032G
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter
Continuous Drain to Source voltage High level input voltage Low level input voltage Continuous drain current Tamb=85 oC (TAmbient = 85oC, IN = 5V, rth = 100oC/W, Tj = 125oC) IPS031G (TAmbient = 85oC, IN = 5V, rth = 85oC/W, Tj = 125oC) IPS032G Rin Recommended resistor in series with IN pin Tr-in(max) Max recommended rise time for IN signal (see fig. 2) Fr-I sc (2) Max. frequency in short circuit condition (Vcc = 14V) Vds (max) VIH VIL Ids
Min.
-- 4 0 -- -- 0.2 -- 0
Max.
35 6 0.5 2.2 1.65 5 1 1
Units
V
A k S kHz
Static Electrical Characteristics
(Tj = 25oC unless otherwise specified.)
Symbol Parameter
Rds(on) Rds(on) Idss
@Tj=25oC
Min.
20 -- 0 0 47 50 7 1 25 50
Typ.
45 75 0.5 5 52 53 8.1 1.6 90 130
Max. Units Test Conditions
60 100 25 50 56 60 9.5 2 200 250 m Vin = 5V, Ids = 1A Vcc = 14V, Tj = 25oC A Vcc = 40V, Tj = 25oC Id = 20mA (see Fig.3 & 4) Id=Ishutdown (see Fig.3 & 4) Iin = 1 mA Id = 50mA, Vds = 14V Vin = 5V Vin = 5V
over-current triggered
ON state resistance Tj = 25oC ON state resistance Tj = 150 oC Drain to source leakage current Drain to source leakage current Drain to source clamp voltage 1 Drain to source clamp voltage 2 IN to source clamp voltage IN threshold voltage ON state IN positive current OFF state IN positive current
Idss2
@Tj=25oC
V clamp 1 V clamp 2 Vin clamp Vth Iin, -on Iin, -off
V
A
Switching Electrical Characteristics
Vcc = 14V, Resistive Load = 5 (IPS031), Resistive Load = 3 (IPS031S), Rinput = 50, 100s pulse,Tj = 25oC, (unless otherwise specified).
Symbol Parameter
Ton Tr Trf T off Tf Qin Turn-on delay time Rise time Time to 130% final Rds(on) Turn-off delay time Fall time Total gate charge
Min.
0.05 0.4 -- 0.8 0.5 --
Typ. Max. Units Test Conditions
0.3 1 8 2 1.5 1.1 0.6 2 -- 3.5 2.5 -- See figure 2
s
See figure 2 nC Vin = 5V
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IPS031G/IPS032G
Protection Characteristics
Symbol Parameter
T sd I sd V reset Treset EOI_OT Over temperature threshold Over current threshold IN protection reset threshold Time to reset protection Short circuit energy (see application note)
Min.
-- 10 1.5 2 --
Typ.
165 14 2.3 10 400
Max. Units Test Conditions
-- 18 3 40 --
o
C A V s J
See fig. 1 See fig. 1 Vin = 0V, Tj = 25oC Vcc = 14V
Functional Block Diagram
All values are typical
DRAIN
47 V
300 200 k
IN
8.1 V 80 A
S R
Q Q I sense T > 165c
I > 1sd
SOURCE Lead Assignments
D D D D
D1 D1 D1 D1 D2 D2 D2 D2
1
1
S
S
S
In
S1 S1 S1 I1 S2 S2 S2 I2
8 Lead SOIC
16 Lead SOIC (Dual) IPS032G Part Number
IPS031G
4
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IPS031G/IPS032G
Vin
5V 0V
Vin 10 %
t < T reset I shutdown t > T reset
90 %
Ids
Isd
Tr-in
90 %
Ids
T
Tsd
(165 c)
10 %
Td on tr
T shutdown
Td off tf
Vds
Figure 1 - Timing diagram
Figure 2 - IN rise time & switching time definitions
T clamp
Vin
Rem : V load is negative during demagnetization
L R D IN S
V load + 14 V -
Ids
Vds clamp
Vin
( Vcc ) 5v 0v
Vds Ids
Vds
( see Appl . Notes to evaluate power dissipation )
Figure 3 - Active clamp waveforms
Figure 4 - Active clamp test circuit
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IPS031G/IPS032G
All curves are typical values with standard footprints. Operating in the shaded area is not recommended.
100 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 8
Tj = 25oC Tj = 150 C
o
200% 180% 160% 140% 120% 100% 80% 60% 40% 20% 0% -50 -25 0 25 50 75 100 125 150 175
Figure 5 - Rds ON (m) Vs Input Voltage (V)
Figure 6 - Normalised Rds ON (%) Vs Tj (oC)
10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 ton delay rise tim e 130% final rdson
10 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5
toff delay fall tim e
6
7
8
Figure 7 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) (us) Vs Input Voltage (V)
Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V)
6
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IPS031G/IPS032G
100
100
delay on rise tim e 130% rdson
10 10
delay off fall tim e
1
1
0 .1 10 100 1000 10000
0 .1 10 100 1000 10000
Figure 9 - Turn-ON Delay Time, Rise Time & Time to 130% final Rds(on) Vs IN Resistor ()
Figure 10 - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor ()
20 18 16 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 Isd 25C Ilim 25C
20 18 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150
Figure 11 - Current Iimimitation & I shutdown (A) Vs Vin (V)
Figure 12 - I shutdown (A) Vs Temperature (oC)
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IPS031G/IPS032G
10 8 6 4 2 0 -50
rth = 50C/W SO8 Std. footprint 100C/W
10 8 6 4 2 0 -50
SO16 Std. footprint 1 m osfet on SO8 Std. footprint 2 m osfets on
0
50
100
150
200
0
50
100
150
200
Figure 13a - Max.Cont. Ids (A) Vs Amb. Temperature (oC) - IPS031G
Figure 13b - Max.Cont. Ids (A) Vs Amb. Temperature (oC) - IPS032G
100 T = 25C T = 100 C
100
single pulse 100 Hz rth=100C/W dT=25C 1kHz rth=100C/W dT=25C
10
10
1
1
Vbat = 14 V Tjini = T sd
0.1
0 .0 1 0 .1 1 10 100
Figure 14 - Ids (A) Vs Protection Resp. Time (s) IPS031G/IPS032G
Figure 15 - Iclamp (A) Vs Inductive Load (mH)
8
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IPS031G/IPS032G
1 00
100
rth SO8 std footprint
10 10
1
1
Single pulse
Single pulse 0 .1 0 .1
0 .0 1
0 .0 1
rth SO16 std footprint 1 mosfet active rth SO16 std footprint 2 mosfets active
Figure 16a - Transient Thermal Imped. (oC/W) Vs Time (s) - IPS031G
Figure 16b - Transient Thermal Imped. (oC/W) Vs Time (s) - IPS032G
200 180 160 140 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 150 Iin,on Iin,off
120% 115% 110% 105% 100% 95% 90% 85% 80% -50 -25 Vds clam p @ Isd Vin clam p @ 10m A 0 25 50 75 100 125 150
Figure 17 - Input current (A) Vs Tj (oC)
Figure 18 - Vin clamp and V clamp2 (%) Vs Tj (oC)
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IPS031G/IPS032G
16 14 12 10 8 6 4 2 0 -50
Treset rise tim e fall tim e
-25
0
25
50
75
100 125 150
Figure 19 - Turn-on, Turn-off, and Treset KI Vs Tj (oC)
Case Outlines
D A 5 B
F OOT PRINT 8X 0.72 [.028]
DIM A b
INCHES MIN .0532 .013 .0075 .189 .1497 MAX .0688 .0098 .020 .0098 .1968 .1574
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00
A1 .0040 c
6 E
8
7
6
5 H 0.25 [.010] A
6.46 [.255]
D E e e1 H K L
8X 1.78 [.070]
1
2
3
4
.050 BAS IC .025 BAS IC .2284 .0099 .016 0 .2440 .0196 .050 8
1.27 BAS IC 0.635 BAS IC 5.80 0.25 0.40 0 6.20 0.50 1.27 8
6X e e1 A C
3X 1.27 [.050]
y
K x 45 y 0.10 [.004]
8X b 0.25 [.010]
A1 CAB
8X L 7
8X c
NOT ES: 1. DIMENS IONING & T OLERANCING PE R ASME Y14.5M-1994. 2. CONT ROLLING DIMENSION: MILLIMET ER 3. DIMENS IONS ARE SHOWN IN MILLIME TE RS [INCHES]. 4. OUT LINE CONF ORMS T O JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS. MOLD PROTRUSIONS NOT T O E XCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS. MOLD PROTRUSIONS NOT T O E XCEED 0.25 [.010]. 7 DIMENSION IS T HE LE NGTH OF LEAD FOR SOLDE RING TO A SUBS TRAT E.
8-Lead SOIC
01-6027 01-0021 11 (MS-012AA)
10
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IPS031G/IPS032G
16 -Lead SOIC (narrow body)
01-6018 01-3064 00 (MS-012AC)
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 6/11/2001
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